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74LS399 Datasheet(PDF) 4 Page - SYC Electronica

Part # 74LS399
Description  QUAD 2-PORT REGISTER
PDF  5 Pages
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Manufacturer  SYC [SYC Electronica]
Direct Link  https://www.sycelectronica.com.ar/index.php
Logo SYC - SYC Electronica

74LS399 Datasheet(HTML) 4 Page - SYC Electronica

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SN54/74LS398
• SN54/74LS399
AC SETUP REQUIREMENTS (TA = 25°C)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tW
Clock Pulse Width
20
ns
VCC = 5.0 V
ts
Data Setup Time
25
ns
VCC = 5.0 V
ts
Select Setup Time
45
ns
VCC = 5.0 V
th
Hold Time, Any Input
0
ns
DEFINITIONS OF TERMS
SETUP TIME(ts) — is defined as the minimum time required
for the correct logic level to be present at the logic input prior to
the clock transition from LOW-to-HIGH in order to be recog-
nized and transferred to the outputs.
HOLD TIME(th) — is defined as the minimum time following
the clock transition from LOW-to-HIGH that the logic level
must be maintained at the input in order to ensure continued
recognition. A negative Hold Time indicates that the correct
logic level may be released prior to the clock transition from
LOW-to-HIGH and still be recognized.
1.3 V
1.3 V
AC WAVEFORMS
Figure 1
Figure 2
Figure 3
*The shaded areas indicate when the input is permitted to change for predictable output performance.
I0 I1 *
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
Q
Q
CP
CP
CP
Q or Q
Q = I0
Q = I1
ts(L)
th(L)
tPHL
tPLH
th(H)
ts(L)
ts(H)
th(L) = 0
th(H) = 0
tPHL
tPLH
tPLH
Q
tPHL
tW(H)
ts(H)
tW(L)
S*
www.sycelectronica.com.ar



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