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MPC8280 Datasheet(PDF) 1093 Page - Freescale Semiconductor, Inc

Part # MPC8280
Description  PowerQUICC??II Family Reference Manual
PDF  1386 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8280 Datasheet(HTML) 1093 Page - Freescale Semiconductor, Inc

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ATM AAL1 Circuit Emulation Service
MPC8280 PowerQUICC II Family Reference Manual, Rev. 1
Freescale Semiconductor
32-33
10–11
ATT
ATM traffic type
00 Peak cell-rate pacing. The host must initialize PCR and the PCR fraction. Other
traffic parameters are not used.
01 Peak and sustain cell rate pacing (VBR traffic). The APC performs a
continuous-state leaky bucket algorithm (GCRA) to pace the channel-sustain cell
rate. The host must initialize PCR, PCR fraction, SCR, SCR fraction, and BT (burst
tolerance).
10 Peak and minimum cell rate pacing (UBR+ traffic). The host must initialize PCR, PCR
fraction, MCR, MCR fraction, and MDA.
11 Reserved.
12
AVCF
Auto VC off. Determines APC behavior when the last buffer associated with this VC has
been sent and no more buffers are in the VC’s TxBD table,
0 The APC does not remove this VC from the schedule table and continues to schedule
it to transmit.
1 The APC removes this VC from the schedule table. To continue transmission after the
host adds buffers for transmission, a new ATM TRANSMIT command is needed, which
can be issued only after the CP clears the VCON bit. (Bit 13)
13
VCON
Virtual channel is on
Should be set by the host before it issues an ATM TRANSMIT command. When the host
sets TCT[STPS] (stop transmit), the CP deactivates this channel and clears VCON
when the channel is next encountered in the APC scheduling table. The host can issue
another ATM TRANSMIT command only after the CP clears VCON.
14–15
INTQ
Points to one of four interrupt queues available.
0x02
0–12
—
Reserved, should be cleared during initialization.
13–15
AAL
AAL type
000 AAL0 —Reassembly with no adaptation layer
001 AAL1 —ATM adaptation layer 1
010 AAL5 —ATM adaptation layer 5.
100 AAL2 —ATM adaptation layer 2. Refer to Chapter 33, “ATM AAL2.”
101 AAL1_CES —ATM adaptation layer 1 with circuit emulation service
All others reserved.
0x04
—
TxDBPTR
Tx data buffer pointer. Holds the real address of the current position in the Tx buffer.
0x08
—
TBDCNT
Transmit BD count. Counts the remaining data to transmit in the current transmit buffer.
Its initial value is loaded from the data length field of the TxBD when a new buffer is
open; its value is subtracted for any transmitted cell associated with this channel.
0x0A
—
TBD_Offset
Transmit BD offset. Holds offset from TBD_BASE of the current BD. Initialize to 0.
0x0C
0–7
Rate
Reminder
Rate remainder. Used by the APC to hold the rate remainder after adding the pace
fraction to the additive channel rate. Initialize to 0.
8–15
PCR Fraction Peak cell rate fraction. Holds the peak cell rate fraction of this channel in units of 1/256
slot. If this is an ABR channel, this field is automatically updated by the CP.
0x0E
—
PCR
Peak cell rate. Holds the peak cell rate (in units of APC slots) permitted for this channel
according to the traffic contract. Note that for an ABR channel, the CP automatically
updates PCR to the ACR value.
0x10
—
—
Protocol-specific
0x16
—
APCLC
APC linked channel. Used by the CP. Initialize to 0 (null pointer).
0x18
—
ATMCH
ATM cell header. Holds the full (4-byte) ATM cell header of the current channel. The
transmitter appends ATMCH to the cell payload during transmission.
Table 32-7. TCT Field Descriptions (continued)
Offset
Bits
Name
Description



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