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VIPER50A-E Datasheet(PDF) 14 Page - STMicroelectronics

Part # VIPER50A-E
Description  SMPS PRIMARY I.C.
PDF  31 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VIPER50A-E Datasheet(HTML) 14 Page - STMicroelectronics

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5 Operation Description
VIPer50A-E/ASP-E
14/31
5.5
External Clock Synchronization:
The OSC pin provides a synchronisation capability when connected to an external frequency
source. Figure 21 shows one possible schematic to be adapted, depending the specific needs.
If the proposed schematic is used, the pulse duration must be kept at a low value (500ns is
sufficient) for minimizing consumption. The optocoupler must be able to provide 20mA through
the optotransistor.
5.6
Primary Peak Current Limitation
The primary IDPEAK current and, consequently, the output power can be limited using the
simple circuit shown in Figure 22 . The circuit based on Q1, R1 and R2 clamps the voltage on
the COMP pin in order to limit the primary peak current of the device to a value:
where:
The suggested value for R1+R2 is in the range of 220KΩ.
5.7
Over-Temperature Protection
Over-temperature protection is based on chip temperature sensing. The minimum junction
temperature at which over-temperature cut-out occurs is 140ºC, while the typical value is
170ºC. The device is automatically restarted when the junction temperature decreases to the
restart temperature threshold that is typically 40ºC below the shutdown value (see Figure 13)
I
DPEAK
V
COMP
0.5
H
ID
--------------------------------
=
V
COMP
0.6
R
1
R
2
+
R
2
-------------------
×
=



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