RT9241APS datasheet(5/17 Pages) RICHTEK

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RT9241A/B

DS9241AB-05

March 2007

www.richtek.com

Functional Pin Description

VID4, VID3, VID2, VID1 and VID0 ( Pin1,2,3,4,5)

DAC voltage identification inputs for VRM9.0. These pins

are TTL-compatible and internally pulled to VDD if left

open.

COMP (Pin 6)

Output of the error amplifier and input of the PWM

comparator.

FB (Pin 7)

Inverting input of the internal error amplifier.

ADJ (Pin 8)

Current sense output for active droop adjust. Connect a

resistor from this pin to GND to set the amount of load

droop. This pin should not be opened.

DVD (Pin 9)

Programmable power UVLO detection input. Trip threshold

= 1.25V at VDVD rising

SS (Pin 10)

Connect this SS pin to GND with a capacitor to set the

start time interval. Pull this pin below 1V (ramp valley of

saw-tooth wave in pulse width modulator) to shutdown

the converter output.

ISN1 (Pin 12), ISN2 (Pin 11)

Current sense inputs from the individual converter channel's

sense component GND nodes.

GND (Pin 13)

Ground for the IC.

VSEN (Pin 14)

Power good and over voltage monitor input. Connect to

the microprocessor-CORE voltage.

ISP1 (Pin 18), ISP2 (Pin 15)

Current sense inputs for individual converter channels. Tie

this pin to the component sense node.

PWM1 (Pin 17), PWM2 (Pin 16)

PWM outputs for each driven channel. Connect these pins

to the PWM input of the MOSFET driver.

PGOOD (Pin 19)

Power good open-drain output.

VDD (Pin 20)

IC power supply. Connect this pin to a 5V supply.

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