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DC Electrical Characteristics Continued (Voltages Referenced to GND)

High Speed CMOS Logic – 54HC00

Rev 1.0

07/02/19

5. Not production tested in die form, characterized by chip design and tested in package.

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

2.0V

1.9

1.9

1.9

4.5V

4.4

4.4

4.4

6.0V

VIN = VIH or VIL

│IOUT│≤ 20µA

5.9

5.9

5.9

V

3.0V

VIN = VIH or VIL

│IOUT│≤ 2.4mA

2.48

2.34

2.20

4.5V

VIN = VIH or VIL

│IOUT│≤ 4.0mA

3.98

3.84

3.70

Minimum High-Level

Output Voltage

VOH

6.0V

VIN = VIH or VIL

│IOUT│≤ 5.2mA

5.48

5.34

5.20

V

2.0V

0.1

0.1

0.1

4.5V

0.1

0.1

0.1

6.0V

VIN = VIL or VIL

│IOUT│≤ 20µA

0.1

0.1

0.1

V

3.0V

VIN = VIL or VIL

│IOUT│≤ 2.4mA

0.26

0.33

0.40

4.5V

VIN = VIL or VIL

│IOUT│≤ 4.0mA

0.26

0.33

0.40

Maximum Low-Level

Output Voltage

VOL

6.0V

VIN = VIL or VIL

│IOUT│≤ 5.2mA

0.26

0.33

0.40

V

Maximum Input

Leakage Current

IIN

6.0V

VIN = VCC or GND

±0.1

±1.0

±1.0

µA

Maximum Quiescent

Supply Leakage

Current

ICC

6.0V

VIN = VCC or GND

IOUT = 0µA

1

10

40

µA

AC Electrical Characteristics5

LIMITS

PARAMETER

SYMBOL

VCC

CONDITIONS

25°C

85°C

FULL RANGE

4

UNITS

2.0V

75

95

110

3.0V

30

40

55

4.5V

15

19

22

Maximum Propagation

Delay, Input A or B to

Output Y

(Figure 1,2)

tPLH, tPHL

6.0V

CL = 50pF,

tr = tf = 6ns

13

16

19

ns

2.0V

75

95

110

3.0V

27

32

36

4.5V

15

19

22

Maximum Output Rise

and Fall Time,

Any Output

(Figure 1,2)

tTLH, tTHL

6.0V

CL = 50pF,

tr = tf = 6ns

13

16

19

ns

4. -55˚C ≤ TJ ≤ +125˚C