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54LS86A Datasheet(PDF) 1 Page - Silicon Supplies |
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54LS86A Datasheet(HTML) 1 Page - Silicon Supplies |
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1 / 4 page ![]() Low Power Schottky Logic – 54LS86A Quadruple 2-Input Exclusive OR Gate IC in bare die form Rev 1.0 21/11/17 Features: The 54LS86A is fabricated using a 2µm 40V Bipolar process. The device contains four independent gates and performs the Boolean functions Y = A ⊕ B = AB + AB in positive logic. The device is characterized over the full Military Temperature Range. Description High speed – 22ns (Typ) propagation delay Low Power – ICC 10mA Max Full Military Temperature Range. Direct drop-in replacement for obsolete components in long term programs. Ordering Information Die Dimensions in µm (mils) The following part suffixes apply: No suffix - MIL-STD-883 /2010B Visual Inspection “H” - MIL-STD-883 /2010B Visual Inspection + MIL-PRF-38534 Class H LAT “K” - MIL-STD-883 /2010A Visual Inspection (Space) + MIL-PRF-38534 Class K LAT LAT = Lot Acceptance Test. Die Size (Unsawn) 1330 x 1090 52 x 43 µm mils Minimum Bond Pad Size 98 x 98 3.86 x 3.86 µm mils Die Thickness 350 (±20) 13.78 (±0.79) µm mils Top Metal Composition Al 1%Si 1.1µm Back Metal Composition N/A – Bare Si For further information on LAT process flows see below. www.siliconsupplies.com\quality\bare-die-lot-qualification Supply Formats: Mechanical Specification Default – Die in Waffle Pack (400 per tray capacity) 1330 (52) Sawn Wafer on Tape – On request Unsawn Wafer – On request Die Thickness <> 350µm(14 Mils) – On request Assembled into Ceramic Package – On request Page 1 of 4 www.siliconsupplies.com |
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