Rev 1.0

18/01/21

Quad 2-input NAND buffer (open drain) in bare die form

Advanced CMOS TTL Input – 74ACT38

Die Size (Unsawn)

1000 x 1190

40 x 47

µm

mils

Minimum Bond Pad Size

100 x 100

4 x 4

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si



Inputs directly accept TTL



Outputs directly interface CMOS, NMOS and TTL



Open-drain output for wired-OR/wired-AND function



Outputs Source/Sink 24 mA



Low Input Current: 1µA



Functionally compatible with bipolar 74LS38, 74F38



Lower power alternative to bipolar logic.

Features:

Ordering Information

The following part suffixes apply:



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54ACT38

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (400 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

74ACT38 provides x4 independent 2-input NAND gates

performing the Boolean function Y = A • B or Y = A + B.

The device is fabricated using an advanced 1.5µm 5V

CMOS process combining high speed LSTTL performance

with CMOS low power consumption. The provision of open-

drain outputs enables implementation of active-low wired-

OR or active-high wired-AND functionality. Device inputs

directly accept both standard CMOS and LSTTL outputs.

All inputs are equipped with protection circuits against static

discharge and transient excess voltage.

Description

Die Dimensions in µm (mils)

1000 (40)

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