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74HC20 Datasheet(PDF) 1 Page - Silicon Supplies |
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74HC20 Datasheet(HTML) 1 Page - Silicon Supplies |
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1 / 5 page ![]() High Speed CMOS Logic – 74HC20 Rev 1.0 7/5/2019 Features: Dual 4-Input NAND Gate IC in bare die form The 74HC20 Dual 4-Input NAND Gate is made using a 2.5µm 5V CMOS process & combines the high speed of LSTTL with CMOS low power consumption. The device performs Boolean functions Y = (A • B • C • D) or Y = A + B + C + D in positive logic. Inputs accept standard CMOS outputs or LSTTL outputs using pull- up resistors. Internal circuitry comprises 3 stages & includes buffered output for high noise immunity & stability. Inputs are equipped with protection circuits against static discharge & transient excess voltage. Description High Speed: tPD = 11ns @ 6V (Typ.) Low Input Current: 1µA Output Drive Capability: 10 LSTTL loads Operating Voltage Range: 2V to 6V CMOS High Noise Immunity Function compatible with 74LS20. Ordering Information The following part suffixes apply: No suffix - MIL-STD-883 /2010B Visual Inspection Die Dimensions in µm (mils) 1200 (47) For High Reliability versions of this product please see 54HC20 Supply Formats: Die Size (Unsawn) 1200 x 1200 47 x 47 µm mils Minimum Bond Pad Size 106 x 106 4 x 4 µm mils Die Thickness 350 (±20) 13.78 (±0.79) µm mils Mechanical Specification Default – Die in Waffle Pack (400 per tray capacity) Sawn Wafer on Tape – On request Unsawn Wafer – On request Die Thickness <> 350µm(14 Mils) – On request Top Metal Composition Al 1%Si 1.1µm Assembled into Ceramic Package – On request Back Metal Composition N/A – Bare Si Page 1 of 5 www.siliconsupplies.com |
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