High Speed CMOS Logic – 74HC32

Die Size (Unsawn)

1200 x 1350

47 x 53

µm

mils

Minimum Bond Pad Size

106 x 106

4.17 x 4.17

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

Quad 2-Input OR Gate in bare die form



Output Drive Capability: 10 LSTTL Loads



Low Input Current: 1µA



Outputs directly interface CMOS, NMOS and TTL



Operating Voltage Range: 2V to 6V



Function compatible with 74LS32



High Noise Immunity CMOS process



Full Military Temperature Range.

Rev 1.1

12/5/20

Features:

The 74HC32 quad 2-input OR gate is fabricated using a

2.5µm 5V CMOS process combining high speed LSTTL

performance with CMOS low power. The device consists

of four independent 2-input OR gates with standard push-

Ordering Information

The following part suffixes apply:



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54HC32

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (400 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

pull outputs and performs the Boolean function Y = A ● B

or Y = A + B. Device inputs are compatible with standard

CMOS outputs; with pull-up resistors, they are compatible

with LSTTL outputs. All inputs are protected against ESD

and excess voltage transients. Internal circuitry comprises

of 2 stages and includes buffered output for high noise

immunity and stability.

Description

Die Dimensions in µm (mils)

1300 (47)

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