Die Size (Unsawn)

1060 x 1690

74 x 67

µm

mils

Minimum Bond Pad Size

110 x 110

4.33 x 4.33

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

Low Power Schottky Logic – 74LS164

8-Bit Serial-Input / Parallel-Output Shift Register in bare die form

Rev 1.0

24/11/17

Aysnchronous Master Reset

Gated Serial Data Input

Fully Synchronous Data Transfers

Direct drop-in replacement for obsolete

components in long term programs.

Industrial temperature range.

Features:

Ordering Information

The following part suffixes apply:

No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54LS164

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (400 per tray capacity)

Sawn Wafer on Tape – On request

Unsawn Wafer – On request

Die Thickness <> 350µm(14 Mils) – On request

Assembled into Ceramic Package – On request

Description

The 74LS164 is fabricated on a 2µm 40V Bipolar process.

The device consists of x2 serial data inputs, A and B,

provided so that one input can be used as a data enable.

Data is entered on each rising edge of the clock. A LOW on

the master reset input (CLR) clears the register, forcing all

outputs LOW, independent of other inputs. All inputs are

equipped with Schottky clamp diodes to limit termination

effects & achieve high speed. These input circuits also

protect against static discharge & transient excess voltage.

 

Die Dimensions in µm (mils)

1880 (74)

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