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M25PE10-VMP6P Datasheet(PDF) 50 Page - STMicroelectronics |
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M25PE10-VMP6P Datasheet(HTML) 50 Page - STMicroelectronics |
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50 / 60 page ![]() DC and AC parameters M25PE20, M25PE10 50/60 Table 20. AC characteristics (25 MHz operation) Test conditions specified in Table 16 and Table 17 Symbol Alt. Parameter Min. Typ. Max. Unit fC fC Clock Frequency for the following instructions: FAST_READ, PW, PP, PE, SE, DP, RDP, WREN, WRDI, RDSR D.C. 25 MHz fR Clock Frequency for READ instructions D.C. 20 MHz tCH (1) 1. tCH + tCL must be greater than or equal to 1/ fC tCLH Clock High Time 18 ns tCL (1) tCLL Clock Low Time 18 ns Clock Slew Rate (2)(peak to peak) 0.1 V/ns tSLCH tCSS S Active Setup Time (relative to C) 10 ns tCHSL S Not Active Hold Time (relative to C) 10 ns tDVCH tDSU Data In Setup Time 5 ns tCHDX tDH Data In Hold Time 5 ns tCHSH S Active Hold Time (relative to C) 10 ns tSHCH S Not Active Setup Time (relative to C) 10 ns tSHSL tCSH S Deselect Time 200 ns tSHQZ (2) 2. Value guaranteed by characterization, not 100% tested in production. tDIS Output Disable Time 15 ns tCLQV tV Clock Low to Output Valid 15 ns tCLQX tHO Output Hold Time 0 ns tTHSL Top Sector Lock Setup Time 50 ns tSHTL Top Sector Lock Hold Time 100 ns tDP (2) S to Deep Power-down 3 µs tRDP (2) S High to Standby Power Mode 30 µs tPW (3) 3. When using PP and PW instructions to update consecutive Bytes, optimized timings are obtained with one sequence including all the Bytes versus several sequences of only a few Bytes. (1 ≤n ≤256) Page Write Cycle Time (256 Bytes) 11 25 ms Page Write Cycle Time (n Bytes) 10.2 + n*0.8/256 tPP (3) Page Program Cycle Time (256 Bytes) 1.2 5ms Page Program Cycle Time (n Bytes) 0.4 + n*0.8/256 tPE Page Erase Cycle Time 10 20 ms tSE Sector Erase Cycle Time 1 5 s |
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