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74LVC4066 Datasheet(PDF) 14 Page - NXP Semiconductors |
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74LVC4066 Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 22 page ![]() 74LVC4066_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 27 August 2007 14 of 22 NXP Semiconductors 74LVC4066 Quad bilateral switch 10.2.1 Test circuits Qinj charge injection CL = 0.1 nF; Vgen =0V; Rgen = 0 Ω; fi = 1 MHz; RL =1 MΩ; see Figure 23 VCC = 1.8 V - 3.3 - pC VCC = 2.5 V - 4.1 - pC VCC = 3.3 V - 5.0 - pC VCC = 4.5 V - 6.4 - pC VCC = 5.5 V - 7.5 - pC Table 11. Additional dynamic characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V); Tamb =25 °C. Symbol Parameter Conditions Min Typ Max Unit Test conditions: VCC = 1.65 V: Vi = 1.4 V (p-p). VCC = 2.3 V: Vi = 2 V (p-p). VCC = 3 V: Vi = 2.5 V (p-p). VCC = 4.5 V: Vi = 4 V (p-p). Fig 18. Test circuit for measuring total harmonic distortion 001aag492 VIH VO VCC 0.5VCC Z/Y Y/Z E 600 Ω fi RL 10 pF CL D Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads −3dB. Fig 19. Test circuit for measuring the frequency response when switch is in ON-state 001aag491 VIH VO VCC 0.5VCC Z/Y Y/Z E 50 Ω fi RL 0.1 pF CL dB |
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