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SM8150AB Datasheet(PDF) 13 Page - Nippon Precision Circuits Inc |
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SM8150AB Datasheet(HTML) 13 Page - Nippon Precision Circuits Inc |
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13 / 22 page ![]() SM8150A SEIKO NPC CORPORATION —13 12. FUNCTIONAL DESCRIPTION 12-1. Startup Method The SM8150A enters standby mode when the VIN supply is applied. After the VEN supply is applied, standby mode is released and operation commences when any one of the DIN1 to 4, DIN5 to 6, DIN7, LDOUT1, LDOUT2 outputs or the DC/DC converter is enabled. 12-2. Standby Mode In standby mode, all SM8150A circuit operation stops, reducing the current consumption. After the VIN sup- ply is applied, the built-in power-ON reset circuit initializes the registers to their default values (see table 1) and the device enters standby mode. Also, when the VEN supply is turned OFF (0V), the registers are initial- ized to their default values and the device enters standby mode. However, when all the outputs are disabled (enable settings 1 and 2), the register values are stored and the device enters standby mode. 12-3. I2C Interface The individual SM8150A settings are set using an I2C interface. The SM8150A has a fixed 8-bit address (slave address) and the device must be addressed before inputting each data setting. The set data has an MSB first 8- bit data structure. The first 3 bits select the register, and the next 5 bits are the write data. Each register is write- only, and cannot be read. Transfer speed is in fast mode (400kbit/s). 12-3-1. Basic cycle Steps (1) to (4) represent the basic data input cycle. (1) Start condition (2) 1st byte (slave address input) (3) 2nd byte to nth byte (settings data input) (4) Stop condition Data transfer begins with the start condition, which is when the SDA input voltage changes from HIGH to LOW while the SCL input voltage is HIGH. Similarly, data transfer ends with the stop condition, which is when the SDA input voltage changes from LOW to HIGH while the SCL input voltage is HIGH. Immediately after each byte (8 bits) in steps (2) and (3), 1 clock cycle is used as an ACK (Acknowledge) cycle. The SM8150A acknowledges that it has recognized the slave address in the first byte by taking the SDA line LOW- level output while the ACK clock cycle is HIGH. No signal is output if the slave address is not recognized. The second to nth bytes are always acknowledged by a LOW-level output bit, regardless of the received data con- tent. The second and successive bytes are received and the corresponding setting is updated until the stop con- dition is input to the device. I2C start/stop condition SDA SCL Start condition Stop condition |
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