CF5010FHC datasheet(16/25 Pages) NPC

16 / 25 page

SM5010 series

SEIKO NPC CORPORATION —16

5010AH

×, BH× series

3V operation/Duty level: CMOS

VDD = 2.7 to 3.6V, VSS = 0V, Ta = −10 to +70°C unless otherwise noted.

5V operation/Duty level: CMOS

VDD = 4.5 to 5.5V, VSS = 0V, Ta = −40 to +85°C unless otherwise noted.

Parameter

Symbol

Condition

Rating

Unit

min

typ

max

Output rise time

tr1

Measurement cct 6, load cct 1, CL = 15pF, 0.1VDD to 0.9VDD

–

Output fall time

tf1

Measurement cct 6, load cct 1, CL = 15pF, 0.9VDD to 0.1VDD

–

Output duty cycle1

1. The duty cycle characteristic is checked the sample chips of each production lot.

Duty

Measurement cct 6, load cct 1, VDD = 3.0V, Ta = 25°C,

CL = 15pF, f = 16MHz

40–60

Output disable delay time

tPLZ

Measurement cct 7, load cct 1, VDD = 3.0V, Ta = 25°C,

CL = 15pF

–

100

Output enable delay time

tPZL

–

100

Parameter

Symbol

Condition

Rating

Unit

min

typ

max

Output rise time

tr1

Measurement cct 6, load cct 1,

0.1VDD to 0.9VDD

CL = 15pF

–

tr2

CL = 50pF

–

Output fall time

tf1

Measurement cct 6, load cct 1,

0.9VDD to 0.1VDD

CL = 15pF

–

tf2

CL = 50pF

–

Output duty cycle1

1. The duty cycle characteristic is checked the sample chips of each production lot.

Duty

Measurement cct 6, load cct 1, VDD = 5.0V, Ta = 25°C,

CL = 15pF, f = 30MHz

45–55

Output disable delay time

tPLZ

Measurement cct 7, load cct 1, VDD = 5.0V, Ta = 25°C,

CL = 15pF

–

100

Output enable delay time

tPZL

–

100

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