TMP86FS28DFG datasheet(77/272 Pages) TOSHIBA

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Page 65

TMP86FS28DFG

5.7 Port P6 (P60 to P67)

Port P6 is an 8-bit input/output port that can also be used for LCD segment output.

A reset initializes the output latch (P6DR) to “1”, the Pch control (P6OUTCR) to “0”, and the LCD output control

To use a pin in Port P6 as an input port, set P6DR to “1” and then set the corresponding bit in P6LCR and

P6OUTCR to “0”.

To use a pin in Port P6 as an LCD segment output, set the corresponding bit in P6LCR to “1”.

The output circuit of Port P6 can be set either as sink open-drain output (“0”) or CMOS output (“1”) individually

for each bit in P6OUTCR.

Port P6 has a separate data input register. The outut latch state can be read from the P6DR register, and the pin

state can be read from the P6PRD register.

Note: An asterisk (*) indicates that either “1” or “0” can be set.

Figure 5-8 Port P6

Table 5-9 Register Programming for Port P6 (P60 to P67)

Function

Programmed Value

P6DR

P6OUTCR

P6LCR

Port input

“1”

“0”

Port "0" output

“0”

Set as

appropriate.

“0”

Port “1” output

“1”

“0”

LCD segment output

“1”

Data input (P6PRD)

Output latch read (P6DR)

STOP

OUTEN

P6OUTCRi input

Data output (P6DR)

P6OUTCRi

P6i

Note) i = 7~0

LCD data output

P6LCRi

P6LCRi input

Output latch

TMP86FS28DFG Datasheet(PDF) 77 Page - Toshiba Semiconductor

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