TC74HC112AP/AF/AFN

2007-10-01

1

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74HC112AP,TC74HC112AF,TC74HC112AFN

Dual J-K Flip Flop with Preset and Clear

The TC74HC112A is a high speed CMOS DUAL J-K FLIP

It achieves the high speed operation similar to equivalent

LSTTL while maintaining the CMOS low power dissipation.

In accordance with the logic levels applied to the J and K

inputs, the outputs change state on the negative going transition

of the clock pulse.

CLR and PR are independent of the clock and are actived

by a low logic level on the corresponding input.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

Features

• Output drive capability: 10 LSTTL loads

• Pin and function compatible with 74LS112

Pin Assignment

Note: xxxFN (JEDEC SOP) is not available in

Japan.

TC74HC112AP

TC74HC112AF

TC74HC112AFN

Weight

DIP16-P-300-2.54A

: 1.00 g (typ.)

SOP16-P-300-1.27A

: 0.18 g (typ.)

SOL16-P-150-1.27

: 0.13 g (typ.)