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TC74HC375AF Datasheet(PDF) 1 Page - Toshiba Semiconductor |
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TC74HC375AF Datasheet(HTML) 1 Page - Toshiba Semiconductor |
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1 / 9 page ![]() TC74HC375AP/AF/AFN 2007-10-01 1 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC375AP,TC74HC375AF,TC74HC375AFN 4-Bit D Type Latch The TC74HC375A is a high speed CMOS D-TYPE LATCH fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It contains two groups of 2-bit latches controlled by an enable input (G1·2 or G3·4) and each group can be used in different circuits. Data applied to the data inputs are transferred to the Q and Q outputs whin the enable inputs is high. When the enable input is low, the outputs are not affected. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 14 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 10 LSTTL loads • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays: tpLH ∼− tpHL • Wide operating voltage range: VCC (opr) = 2 to 6 V • Pin and function compatible with 74LS375 Pin Assignment Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC375AP TC74HC375AF TC74HC375AFN Weight DIP16-P-300-2.54A : 1.00 g (typ.) SOP16-P-300-1.27A : 0.18 g (typ.) SOL16-P-150-1.27 : 0.13 g (typ.) |
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