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TB6552FL Datasheet(PDF) 9 Page - Toshiba Semiconductor |
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TB6552FL Datasheet(HTML) 9 Page - Toshiba Semiconductor |
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9 / 14 page ![]() TB6552FN/FNG/FL/FLG 2007-4-2 9 Requests Concerning Use of QON Outline Drawing of Package When using QON, take into account the following items. Caution (1) Do not carry out soldering on the island sections in the four corners of the package (indicated by the hatched sections in the figure for the lower surface, above left) with the aim of increasing mechanical strength. (2) The projecting island sections on the package surfaces (indicated by the hatched sections in the figures for the upper and lower surfaces above) must be electrically insulated from outside when used. Note 6: Ensure that the island sections (indicated by the hatched sections in the figure for the lower surface, above left) do not come into contact with solder from through-holes on the board layout. • When mounting or soldering, take care to ensure that neither static electricity nor electrical overstress is applied to the IC. (Measures to prevent electrostatic discharge, leaks, etc.) • When incorporating the IC into a set, adopt a set design that does not apply voltage directly to the island section. Upper surface Lower surface |
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