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M29W400DT Datasheet(PDF) 21 Page - STMicroelectronics

Part # M29W400DT
Description  4 Mbit (512 Kb x 8 or 256 Kb x 16, boot block) 3 V supply Flash memory
PDF  48 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M29W400DT Datasheet(HTML) 21 Page - STMicroelectronics

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M29W400DT, M29W400DB
Command interface
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within about 100 µs, leaving the data unchanged. No error condition is given when protected
blocks are ignored.
During the erase operation the memory will ignore all commands. It is not possible to issue
any command to abort the operation. Typical chip erase times are given in Table 4. All Bus
Read operations during the Chip Erase operation will output the Status Register on the Data
inputs/outputs. See the section on the Status Register for more details.
After the Chip Erase operation has completed the memory will return to the Read mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
The Chip Erase command sets all of the bits in unprotected blocks of the memory to ’1’. All
previous data is lost.
4.8
Block Erase command
The Block Erase command can be used to erase a list of one or more blocks. Six Bus Write
operations are required to select the first block in the list. Each additional block in the list can
be selected by repeating the sixth Bus Write operation using the address of the additional
block. The Block Erase operation starts the Program/Erase controller about 50 µs after the
last Bus Write operation. Once the Program/Erase controller starts it is not possible to select
any more blocks. Each additional block must therefore be selected within 50 µs of the last
block. The 50 µs timer restarts when an additional block is selected. The Status Register
can be read after the sixth Bus Write operation. See the Status Register for details on how
to identify if the Program/Erase controller has started the Block Erase operation.
If any selected blocks are protected then these are ignored and all the other selected blocks
are erased. If all of the selected blocks are protected the Block Erase operation appears to
start but will terminate within about 100 µs, leaving the data unchanged. No error condition
is given when protected blocks are ignored.
During the Block Erase operation the memory will ignore all commands except the Erase
Suspend command. Typical block erase times are given in Table 4. All Bus Read operations
during the Block Erase operation will output the Status Register on the Data inputs/outputs.
See the section on the Status Register for more details.
After the Block Erase operation has completed the memory will return to the Read mode,
unless an error has occurred. When an error occurs the memory will continue to output the
Status Register. A Read/Reset command must be issued to reset the error condition and
return to Read mode.
The Block Erase command sets all of the bits in the unprotected selected blocks to ’1’. All
previous data in the selected blocks is lost.
4.9
Erase Suspend command
The Erase Suspend command may be used to temporarily suspend a Block Erase operation
and return the memory to Read mode. The command requires one Bus Write operation.
The Program/Erase controller will suspend within the Erase Suspend Latency time after the
Erase Suspend command is issued (see Table 4 for numerical values). Once the
Program/Erase controller has stopped the memory will be set to Read mode and the Erase



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