TDA19988 datasheet(6/54 Pages) NXP

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TDA19988

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Product data sheet

Rev. 3 — 21 July 2011

6 of 54

NXP Semiconductors

TDA19988

HDMI 1.4a transmitter with HDCP and CEC support

Pinning information

6.1 Pinning

6.2 Pin description

Fig 3.

Pin configuration (TFBGA64)

ball A1

index area

001aan686

TDA19988

Transparent top view

Table 2.

Pin description

Symbol

Type[1]

Description

ACLK

audio clock input

AP0

audio port 0 input

AP1

audio port 1 input

AP2

audio port 2 input

OSC_IN/AP3

input connected to the external oscillator circuit or external

clock source/audio port 3 input

HPD

hot plug detect; 5 V tolerant

EXT_SWING

TMDS output swing adjustment; place resistor

(REXT_SWING =10k 1 %) between this pin and analog

ground.

DSDA

I/O

DDC-bus data input/output; 5 V tolerant

DSCL

DDC-bus clock input; 5 V tolerant

VCLK

input video pixel clock

HSYNC/HREF

input horizontal synchronization or reference input

VSYNC/VREF

input vertical synchronization or reference input

DE/FREF

data enable or field reference input

CSCL

I2C-bus clock input; 1.8 V to 3.3 V tolerant

CSDA

I/O

I2C-bus data input/output; 1.8 V to 3.3 V tolerant

INT

I/O

interrupt HDMI output (open-drain); this pin is used as Dual

function pin selectable through I2C-bus. In calibration mode

only this pin is used as input for 10 ms

 1 % calibration pulse.

In operation mode this pin is used to warn the external

microprocessor that a special event has occurred for HDMI or

CEC

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