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CD54HC646 Datasheet(PDF) 11 Page - Texas Instruments

Part # CD54HC646
Description  OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
PDF  18 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CD54HC646 Datasheet(HTML) 11 Page - Texas Instruments

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CD54HC646, CD74HCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCHS278B – APRIL 2003 – REVISED APRIL 2003
11
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION – CD74HCT646
Test
Point
From Output
Under Test
CL
(see Note A)
VCC
S1
S2
LOAD CIRCUIT
PARAMETER
tPZH
tpd or tt
tdis
ten
tPZL
tPHZ
tPLZ
Open
Closed
S1
Closed
Open
S2
Open
Closed
Closed
Open
Open
Open
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR
≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. For clock inputs, fmax is measured with the input duty cycle at 50%.
E. The outputs are measured one at a time with one input transition per measurement.
F. tPLZ and tPHZ are the same as tdis.
G. tPZL and tPZH are the same as ten.
H. tPLH and tPHL are the same as tpd.
1 k
Ω
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
th
tsu
1.3 V
0.3 V
0.3 V
2.7 V
2.7 V
3 V
3 V
0 V
0 V
tr
tf
Reference
Input
Data
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
1.3 V
10%
10%
90%
90%
3 V
VOH
VOL
0 V
tr
tf
Input
In-Phase
Output
tPLH
tPHL
1.3 V
10%
10%
90%
90%
VOH
VOL
tr
tf
tPHL
tPLH
Out-of-Phase
Output
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
3 V
Output
Control
Output
Waveform 1
(see Note B)
Output
Waveform 2
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈VCC
0 V
10%
≈0 V
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
90%
3 V
VOLTAGE WAVEFORMS
RECOVERY TIME
3 V
0 V
CLR
Input
CLK
3 V
trec
0 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
1.3 V
Figure 3. Load Circuit and Voltage Waveforms



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