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CDCLVD2102 Datasheet(PDF) 7 Page - Texas Instruments

Part # CDCLVD2102
Description  Dual 1:2 Low Additive Jitter LVDS Buffer
PDF  22 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

CDCLVD2102 Datasheet(HTML) 7 Page - Texas Instruments

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Frequency − MHz
700
T = 25 C
A
o
2.625V
2.5V
2.375V
CDCLVD2102
www.ti.com
SCAS904A – MAY 2010 – REVISED JUNE 2010
TYPICAL CHARACTERISTICS
INPUT CLOCK AND OUTPUT CLOCK PHASE NOISES
vs
FREQUENCY FROM THE CARRIER (TA = 25°C and VCC = 2.5V)
Input clock jitter is 32 fs from 10 kHz to 20 MHz and additive RMS jitter is 152 fs
Figure 3. 100 MHz Input and Output Phase Noise Plot
Differential Output Voltage
vs
Frequency
Figure 4.
Copyright © 2010, Texas Instruments Incorporated
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