LM34902

SNVS804B – MAY 2012 – REVISED APRIL 2013

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Connection Diagram

Figure 1. Top View

6-Bump Thin DSBGA Package

See Package Number YFQ

PIN DESCRIPTION

Pin

Name

Function

Number

Power input of the PFET switch. It also provides power to the entire IC. Connect to the voltage rail that the

VCC

A1

accessory device is expected to work off.

GND

B1

Common Ground (device substrate).

POK

C1

Open-drain PFET status indicator. When the PFET is off, this pin floats. When PFET is on, it is grounded.

ACC_DET

C2

Pull this pin low to tell the IC that the downstream accessory device is plugged in.

When this pin is low, the PFET will be turned off and POK will be open-drained. Current limit circuitry will also

ENABLE

B2

be disabled. The IC will be in a low-power state. This pin should be held low until VCC is established to

ensure proper initial state of internal logic. When ENABLE is high, the PFET switch will be allowed to turn on.

ACC_PWR

A2

Power output terminal of the PFET switch. Connect to input rail of accessory device.

Truth Table

Input

Output

Current Limit

TJ Limit

PFET Switch

ENABLE

ACC_DET

2.8V < VCC < 5.3V

POK

Detected

Exceeded

Status

0

x

No

No

Yes

Open

Open Drain

x

1

No

No

Yes

Open

Open Drain

0 to 1

0

No

No

Yes

On

Grounded

0 to 1

0

Yes

No

Yes

Current Limited

Grounded

x

x

x

Yes

2.2V < VCC < 5.3V

Open

Open Drain

0

x

x

No

2.2V < VCC < 2.8V

Open

Open Drain

Note: "x" stands for "don't care".

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1)

VCC

-0.3V to 6V

ENABLE, POK, ACC_DET,

ACC_PWR(2)

-0.3V to 6V

Junction Temperature (TJ)

+150°C

Storage Temperature Range

−65°C to +150°C

ESD Susceptibility, Human Body Model(3)

2kV

(1)

Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which

operation of the device is ensured. Operating Ratings do not imply ensured performance limits. For ensured performance limits and

associated test conditions, see the Electrical Characteristics table.

(2)

The voltages on these pins should never exceed VCC+0.3V.

(3)

The human body model is a 100pF capacitor discharged through a 1.5 k

Ω resistor into each pin. Test method is per JESD-22-A114.

2

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