RT =

(1/F) - 235 x 10

-9

182 x 10

-12

:

LM5041

SNVS248D – AUGUST 2003 – REVISED MARCH 2013

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Current Limit/Current Sense

The LM5041 contains two levels of over-current protection. If the voltage at the CS pin exceeds 0.5V the present

buck stage duty cycle is terminated (cycle by cycle current limit). If the voltage at the CS pin overshoots the 0.5V

threshold and exceeds 0.6V, then the controller will terminate the present cycle and fully discharge the soft-start

capacitor. A small RC filter located near the controller is recommended to filter current sense signals at the CS

pin. An internal MOSFET discharges the external CS pin for an additional 50ns at the beginning of each cycle to

reduce the leading edge spike that occurs when the buck stage MOSFET is turned on.

The LM5041 current sense and PWM comparators are very fast, and may respond to short duration noise

pulses. Layout considerations are critical for the current sense filter and sense resistor. The capacitor associated

with the CS filter must be placed close to the device and connected directly to the pins of the controller (CS and

GND). If a current sense transformer is used, both leads of the transformer secondary should be routed to the

sense resistor, which should also be located close to the IC. A resistor may be used for current sensing instead

of a transformer, located in the push-pull transistor sources, but a low inductance type of resistor is required.

When designing with a sense resistor, all of the noise sensitive low power grounds should be connected together

around the IC and a single connection should be made to the high current power ground (sense resistor ground

point).

The second level current sense threshold is intended to protect the power converter by initiating a low duty cycle

hick-up mode when abnormally high currents are sensed. If the second level threshold is reached, the soft-start

capacitor will be discharged and a start-up sequence will commence when the soft-start capacitor is determined

to be fully discharged. The second level threshold will only be reached when a high dV/dt is present at the

current sense pin. The current sense transient must be fast enough to reach the second level threshold before

the first threshold detector turns off the buck stage driver. Very high current sense dV/dt can occur with a

saturated power inductor or shorted load. Excessive filtering on the CS pin such as an extremely low value

current sense resistor or an inductor that does not saturate with excessive loading, may prevent the second level

threshold from being reached. If the second level threshold is never exceeded during an overload condition, the

first level current sense will continue cycle by cycle limiting and the output characteristic of the converter will be

that of a current source. However, a sustained overload current level can cause excessive temperatures in the

power train especially the output rectifiers.

Oscillator and Sync Capability

The LM5041 oscillator is set by a single external resistor connected between the RT pin and GND. To set a

desired oscillator frequency (F), the necessary RT resistor can be calculated from:

(1)

The buck stage will switch at the oscillator frequency and each push-pull output will switch at half the oscillator

frequency in a push-pull configuration. The LM5041 can also be synchronized to an external clock. The external

clock must have a higher frequency than the free running frequency set by the RT resistor. The clock signal

should be capacitively coupled into the RT pin with a 100pF capacitor. A peak voltage level greater than 3V is

required for detection of the sync pulse. The sync pulse width should be set in the 15 to 150ns range by the

external components. The RT resistor is always required, whether the oscillator is free running or externally

synchronized. The voltage at the RT pin is internally regulated to 2V. The RT resistor should be located very

close to the device and connected directly to the pins of the IC (RT and GND).

Slope Compensation

The PWM comparator compares the current sense signal to the voltage at the COMP pin. The output stage of

the internal error amplifier generally drives the COMP pin. At duty cycles greater than 50 percent, current mode

control circuits are subject to sub-harmonic oscillation. By adding an additional fixed ramp signal (slope

compensation) to the current sense ramp, oscillations can be avoided. The LM5041 integrates this slope

compensation by buffering the internal oscillator ramp and summing a current ramp generated by the oscillator

internally with the current sense signal. Additional slope compensation may be provided by increasing the source

impedance of the current sense signal.

12

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