TEST CIRCUIT

VOLTAGE WAVEFORMS

50

Ω

−3 V

3 V

Output

Input

VOL

VOH

tPHL

Generator

(see Note B)

tPLH

Output

CL

(see Note A)

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.

0 V

0 V

50%

50%

50

Ω

TEST CIRCUIT

VOLTAGE WAVEFORMS

0 V

2.25 V

Output

Input

VOL

VOH

tPLH

Generator

(see Note B)

RL

3 V

FORCEOFF

RS-232

Output

tPHL

CL

(see Note A)

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.

50%

50%

1.125 V

1.125 V

50

Ω

TEST CIRCUIT

VOLTAGE WAVEFORMS

−3 V

−3 V

3 V

3 V

0 V

3 V

Output

Input

VOL

VOH

tTLH

Generator

(see Note B)

RL

3 V

FORCEOFF

RS-232

Output

tTHL

CL

(see Note A)

SR(tr) +

6 V

t

THL or tTLH

NOTES: A. CL includes probe and jig capacitance.

B. The pulse generator has the following characteristics: PRR = 250 kbit/s, ZO = 50 Ω, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.

MAX3318

www.ti.com

SLLS687A – OCTOBER 2005 – REVISED OCTOBER 2013

PARAMETER MEASUREMENT INFORMATION

Figure 1. Driver Slew Rate

Figure 2. Driver Pulse Skew

Figure 3. Receiver Propagation Delay Times

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