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OPA657-DIE

SBOS787 – AUGUST 2016

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Copyright © 2016, Texas Instruments Incorporated

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

4 Bare Die Information

DIE THICKNESS

BACKSIDE FINISH

BACKSIDE

POTENTIAL

BOND PAD

METALLIZATION COMPOSITION

BOND PAD

THICKNESS

15 mils.

Silicon with backgrind

VS-

TiW/AlCu (0.5%)

1100 nm

(1)

Substrate is VS–.

Bond Pad Coordinates in Microns(1)

DESCRIPTION

PAD NUMBER

X MIN

Y MIN

X MAX

Y MAX

Inverting input

1

27

623

127

723

NonInverting input

2

27

53

127

153

N/C

3

181

53

281

153

Output

4

723

27

823

127

VS–

5

723

337

823

439

VS+

6

723

649

823

749

N/C

7

181

623

281

723