TL507C datasheet(6/8 Pages) TI

6 / 8 page

TL507C, TL507l

ANALOG-TO-DIGITAL CONVERTER

SLAS041 – OCTOBER 1979 – REVISED OCTOBER 1988

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PRINCIPLES OF OPERATION

The TL507 is a single-slope analog-to-digital converter. All single-slope converters are basically voltage-to-time

or current-to-time converters. A study of the functional block diagram shows the versatility of the TL507.

An external clock signal is applied through a buffer to a negative-edge-triggered synchronous counter.

Binary-weighted resistors from the counter are connected to an operational amplifier used as an adder. The

operational amplifier generates a signal that ramps from 0.75

• VCC1 down to 0.25 • VCC1. Comparator 1

compares the ramp signal to the analog input signal. Comparator 2 functions as a fault defector. With the analog

input voltage in the range 0.25

• VCC1 to 0.75 • VCC1, the duty cycle of the output signal is determined by the

unknown analog input, as shown in Figure 2 and the Function Table.

For illustration, assume VCC1 = 5.12 V,

0.25

• VCC1 = 1.28 V

1 binary count

(0.75

* 0.25) V

CC1

128

+ 20 mV

0.75

• VCC1 – 1 count = 3.82 V

The output is an open-collector n-p-n transistor capable of withstanding up to 18 V in the off state. The output

is current limited to the 8- to 12-mA range; however, care must be taken to ensure that the output does not

exceed 5.5 V in the on state.

The voltage regulator section allows operation f rom either an unregulated 8- to 18-V VCC2 source or a regulated

3.5- to 6-V VCC1 source. Regardless of which external power source is used, the internal circuitry operates at

VCC1. When operating from a VCC1 source, VCC2 may be connected to VCC1 or left open. When operating from

a VCC2 source, VCC1 can be used as a reference voltage output.

Analog Input

Level 1

1.28 V

3.82 V

Output for

Input Level 2

Output for

Input Level 1

Ramp Input to

Comparator 1

Analog Input

Level 2

Figure 2

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