SN74HC244EP

OCTAL BUFFER AND LINE DRIVER

WITH 3STATE OUTPUTS

SCLS463A − JULY 2002 − REVISED JANUARY 2004

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

D Extended Temperature Performance of Up

To −55

°C to 125°C

D Enhanced Diminishing Manufacturing

Sources (DMS) Support

D Enhanced Product-Change Notification

D Qualification Pedigree†

D 3-State Outputs Drive Bus Lines or Buffer

Memory Address Registers

D High-Current Outputs Drive Up To 15

LSTTL Loads

† Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life.

description/ordering information

This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state

memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is

organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device

passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the

high-impedance state.

ORDERING INFORMATION

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 125°C

SOP − DW

Tape and reel

SN74HC244QDWREP

SHC244EP

−40

°C to 125°C

TSSOP − PW

Tape and reel

SN74HC244QPWREP

SHC244EP

−55

°C to 125°C

SOP − DW

Tape and reel

SN74HC244MDWREP

HC244MEP

‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

FUNCTION TABLE

(each buffer/driver)

INPUTS

OUTPUT

OE

A

OUTPUT

Y

L

H

H

L

LL

H

X

Z

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

1OE

1A1

2Y4

1A2

2Y3

1A3

2Y2

1A4

2Y1

GND

VCC

2OE

1Y1

2A4

1Y2

2A3

1Y3

2A2

1Y4

2A1

DW OR PW PACKAGE

(TOP VIEW)

Copyright

 2004, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.