X24C08PI datasheet(3/16 Pages) ICMIC

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X24C08

DEVICE OPERATION

The X24C08 supports a bidirectional bus oriented pro-

tocol. The protocol defines any device that sends data

onto the bus as a transmitter, and the receiving device as

the receiver. The device controlling the transfer is a

master and the device being controlled is the slave. The

master will always initiate data transfers, and provide

the clock for both transmit and receive operations.

Therefore, the X24C08 will be considered a slave in all

applications.

Clock and Data Conventions

Data states on the SDA line can change only during SCL

LOW. SDA state changes during SCL HIGH are re-

served for indicating start and stop conditions. Refer to

Figures 1 and 2.

Start Condition

All commands are preceded by the start condition,

which is a HIGH to LOW transition of SDA when SCL is

HIGH. The X24C08 continuously monitors the SDA and SCL

lines for the start condition and will not respond to any

command until this condition has been met.

Stop Condition

All communications must be terminated by a stop condition

which is a LOW to HIGH transition of SDA when

SCL is HIGH. The stop condition is also used by the X24C08

to place the device into the standby power

mode after a read sequence. A stop condition can only be

issued after the transmitting device has released the

bus.

Figure 1. Data Validity

SCL

SDA

DATA STABLE

DATA

CHANGE

3842 FHD F06

Figure 2. Definition of Start and Stop

SCL

SDA

START BIT

STOP BIT

3842 FHD F07

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