X24320AFP datasheet(3/17 Pages) ICMIC

3 / 17 page

X24320

DEVICE OPERATION

The device supports a bidirectional bus oriented

protocol. The protocol defines any device that sends

data onto the bus as a transmitter, and the receiving device

as the receiver. The device controlling the

transfer is a master and the device being controlled is the

slave. The master will always initiate data transfers

and provide the clock for both transmit and receive

operations. Therefore, the device will be

considered a slave in all applications.

Clock and Data Conventions

Data states on the SDA line can change only during

SCL LOW. SDA state changes during SCL HIGH are

reserved for indicating start and stop conditions. Refer to

Figures 1 and 2.

Start Condition

All commands are preceded by the start condition,

which is a HIGH to LOW transition of SDA when SCL

is HIGH. The device continuously monitors the SDA and

SCL lines for the start condition and will not

respond to any command until this condition has been met

SCL

SDA

DATA STABLE

DATA

CHANGE

7035 FM 03

SCL

SDA

START BIT

STOP BIT

7035 FM 04

Figure 1. Data Validity

Figure 2. Definition of Start and Stop

X24320AFP Datasheet(PDF) 3 Page - IC MICROSYSTEMS