X24C02

11

Guidelines for Calculating Typical Values of

Bus Pull-Up Resistors

SYMBOL TABLE

Must be

steady

Will be

steady

May change

from Low to

High

Will change

from Low to

High

May change

from High to

Low

Will change

from High to

Low

Don’t Care:

Changes

Allowed

Changing:

State Not

Known

N/A

Center Line

is High

Impedance

OUTPUTS

INPUTS

WAVEFORM

120

100

80

40

60

20

20

40

60

80100120

0

0

BUS CAPACITANCE (pF)

MIN.

RESISTANCE

MAX.

RESISTANCE

R

MAX

=

C

BUS

t

R

R

MIN

=

I

OL MIN

V

CC MAX

=1.8KΟ

3838 FHD F17

WRITE CYCLE LIMITS

Symbol

Parameter

Min.

Typ.

(5)

Max.

Units

t

WR

(6)

Write Cycle Time

5

10

ms

3838 PGM T08

The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle.

During the write cycle, the X24C02 bus interface circuits are disabled, SDA is allowed to remain high, and the device does not

respond to its slave address.

Write Cycle Timing

3838 FHD F05

SCL

SDA

8th BIT

WORD n

ACK

t

WR

STOP

CONDITION

START

CONDITION

X24C02

ADDRESS

device requires to perform the internal write operation.