XC9103D092ML datasheet(6/23 Pages) TOREX

6 / 23 page

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XC9103/XC9104/XC9105 Series

■ TYPICAL APPLICATION CIRCUIT

■NOTES ON USE

When obtaining VDD from a source other than VOUT,

please insert a capacitor CIN between the VDD pin and the

GND pin in order to provide stable operations.

Please place CL and CIN as close as to the VOUT and VDD

pins respectively and also close to the GND pin.

Strengthen the wiring sufficiently. RSENSE should be

removed and shorted when the CL capacitor except for

ceramic or low ESR capacitor is used.

Insert RB and CB when using a bipolar

NPN Transistor.

SCE

SPWM

CONDITIONS

−

Chip Disable

OFF

Duty=25%, PWM/PFM automatic switching

OFF

PWM

By using external signals, the control of the XC9105 series can be

alternated between PWM control and PWM/PFM automatic switching

control. By inputting a voltage of more than VDD -0.2V to the CE/PWM

pin, PWM control can be selected.

On the other hand, PWM/PFM

automatic switching control can be selected by inputting a voltage of less

than VDD -1.0V.

With the XC9105, by connecting resistors of the same value (RM1, RM2) as

shown in the diagram to the left, it is possible to obtain chip disable with

SCE ON and, SPWM ON or OFF, PWM/PFM auto switching at Duty=25%

with SCE OFF & SPWM ON, & PFM control with both switches OFF.

Note:

When operating at VDD -1.8V and below (stepping-up from VIN=0.9V), it is

necessary to pull-up to VDD in order to allow the CE/PWM pin reach the

VCEH voltage level. Please make sure that the IC is in PWM control

(SPWM=OFF) when operations start. If SPWM is ON, there are times when

chip enable might not operate.

* Please select your external components carefully.

XC9103D092ML Datasheet(PDF) 6 Page - Torex Semiconductor