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PM6680ATR Datasheet(PDF) 37 Page - STMicroelectronics |
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PM6680ATR Datasheet(HTML) 37 Page - STMicroelectronics |
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37 / 48 page ![]() PM6680A Design guidelines 37/48 Figure 37. Virtual ESR network The T node voltage is the sum of the output voltage and the triangular waveform generated by the virtual ESR network. In fact the virtual ESR network behaves like a further equivalent ESR. A good trade-off is to design the network in order to achieve an RESR given by: Equation 28 where ∆IL is the inductor current ripple and V RIPPLE is the overall ripple of the T node voltage. It should be chosen higher than approximately 30 mV. The new closed loop gain depends on CINT. In order to ensure stability it must be verified that: Equation 29 Where: COMP COMP OU OU T T C CINT INT R RINT INT C CFILT FILT t Vr C COUT OUT COMP pin voltage L L D D Output voltage C C R R R1 R1 t t T T node voltage ∆V ∆V1 R ROUT OUT ∆V1 + - Vr Vr gm gm Vr Vr + PWM PWM Comparator Comparator V1 V1 FB FB R R1 1 R R2 2 COMP COMP OU OU T T C CINT INT R RINT INT C CFILT FILT t Vr C COUT OUT COMP pin voltage L L D D Output voltage C C R R R1 R1 t t T T node voltage ∆V ∆V1 R ROUT OUT ∆V1 + - Vr Vr gm gm Vr Vr + PWM PWM Comparator Comparator V1 V1 FB FB R R1 1 R R2 2 R R1 1 R R2 2 out L RIPPLE ESR R I V R − ∆ = OUT Z m INT V Vr f 2 g C × × π > |
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