TMP105

0.1 F

m

V+

GND

A2

B2

C1

ALERT

(Output)

C2

A0

B1

A1

SCL

SDA

To

Two-Wire

Controller

I/O

Control

Interface

SCL

SDA

Temperature

Register

Configuration

Register

T

LOW

Register

T

HIGH

Register

Pointer

Register

TMP105

www.ti.com

SLLS648D

– FEBRUARY 2005 – REVISED SEPTEMBER 2011

APPLICATIONS INFORMATION

The TMP105 is a digital temperature sensor that is optimal for thermal management and thermal protection

applications. The TMP105 is Two-Wire and SMBus interface-compatible, and is specified over a temperature

range of

–40°C to +125°C.

The TMP105 requires no external components for operation except for pull-up resistors on SCL, SDA, and

ALERT, although a 0.1

μF bypass capacitor is recommended, as shown in Figure 1. SCL, SDA and ALERT can

be tied to a 1.8V supply or V+ through pull-up resistors. A0 should be tied to V+ or GND.

Note:

SCL, SDA, and ALERT pins require pull-up resistors.

Figure 1. Typical Connections of the TMP105

The sensing device of the TMP105 is the chip itself. Thermal paths run through the package leads. The lower

thermal resistance of metal causes the leads to provide the primary thermal path.

To maintain accuracy in applications requiring air or surface temperature measurement, care should be taken to

isolate the package and leads from ambient air temperature.

POINTER REGISTER

Figure 2 shows the internal register structure of the TMP105. The 8-bit Pointer Register of the devices is used to

address a given data register. The Pointer Register uses the two LSBs to identify which of the data registers

should respond to a read or write command. Table 1 identifies the bits of the Pointer Register byte. Table 2

describes the pointer address of the registers available in the TMP105. Power-up reset value of P1/P0 is 00.

Figure 2. Internal Register Structure of the TMP105

Copyright

© 2005–2011, Texas Instruments Incorporated

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