IP1000A LF
Preliminary Data Sheet
63/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
3.2.3.3
SubsystemVendorId
Class............................. EEPROM Fields
I/O Base Address ......... 0x00, accessed via the EepromCtrl register
Address Offset .............. 0x02
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
15..0
SubsystemVendorId Subsystem
Vendor
ID.
SubsystemVendorId
corresponds
to
the
SubsystemVendorId register.
3.2.3.4
SubsystemId
Class............................. EEPROM Fields
I/O Base Address ......... 0x00, accessed via the EepromCtrl register
Address Offset .............. 0x03
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
15..0
SubsystemId
Subsystem ID. SubsystemId corresponds to the SubsystemId register.
3.2.3.5
PCI IO/Mem Base Address [15:8]
Class............................. EEPROM Fields
I/O Base Address ......... 0x00, accessed via the EepromCtrl register
Address Offset .............. 0x04
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
0
APS
Default setting as 1
7..1
Reserved
Reserved for future use.
15..8
PCI IO/Mem Base
Address[15:8]
At ForcedConfig Mode, PCI IO/Mem Base Address[15:8] are setted from the
field.
3.2.3.6
PCI IO/Mem Base Address [31:16]
Class............................. EEPROM Fields
I/O Base Address ......... 0x00, accessed via the EepromCtrl register
Address Offset .............. 0x05
Access Rule.................. Word
Width ............................ 16 bits
Bit
BIT Name
BIT Description
15..0
PCI IO/Mem Base
Address[31:16]
At ForcedConfig Mode, PCI IO/Mem Base Address[31:16] are setted from
the field.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
