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ADC14155LCVAL Datasheet(PDF) 8 Page - Texas Instruments |
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ADC14155LCVAL Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 36 page ![]() V A AGND To Internal Circuitry I/O 8 ADC14155QML-SP SNAS378L – NOVEMBER 2008 – REVISED FEBRUARY 2019 www.ti.com Product Folder Links: ADC14155QML-SP Submit Documentation Feedback Copyright © 2008–2019, Texas Instruments Incorporated (1) Pre and post irradiation limits are identical to those listed in the Electrical Characteristics tables. Radiation testing is performed per MIL- STD-883, Test Method 1019. (2) The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided current is limited per Note 5. However, errors in the A/D conversion can occur if the input goes above 2.6V or below GND as described in the Recommended Operating Conditions section. (3) To ensure accuracy, it is required that |VA – VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin. (4) With the test condition for VREF = 1 V (2-VP-P differential input), the 14-bit LSB is 122.1 µV. (5) When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be limited to ±5 mA. The ±50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of ±5 mA to 10. (6) Typical figures are at TA = 25°C and represent most likely parametric norms at the time of product characterization. The typical specifications are not ensured. 6.6 ADC14155 Converter Electrical Characteristics (Continued) DYNAMIC Parameters (1) Unless otherwise specified, the following specifications apply: AGND = DGND = DRGND = 0 V, VA = VD = 3.3 V, VDR = 1.8 V, Internal VREF = 1 V, fCLK = 155 MHz, VCM = VRM, CL = 5 pF/pin, Differential Analog Input, Single-Ended Clock Mode, Offset Binary Format. Typical values are for TA = 25°C. (2) (3) (4) (5) PARAMETER TEST CONDITIONS NOTES TYP(6) MIN MAX UNITS SUB- GROUPS DYNAMIC CONVERTER CHARACTERISTICS, AIN = -1 dBFS FPBW Full power bandwidth -1 dBFS Input, -3 dB Corner 1.1 GHz SNR Signal-to-noise ratio fIN = 10 MHz 69 dBFS fIN = 70 MHz 70.1 66.7 dBFS [4, 5, 6] fIN = 169 MHz 68.5 dBFS fIN = 238 MHz 68.5 dBFS fIN = 398 MHz 66.4 dBFS SFDR Spurious free dynamic range fIN = 10 MHz 82 dBFS fIN = 70 MHz 82.3 68.2 dBFS [4, 5, 6] fIN = 169 MHz 80.5 dBFS fIN = 238 MHz 77.3 dBFS fIN = 398 MHz 63.5 dBFS ENOB Effective number of bits fIN = 10 MHz 11.3 Bits fIN = 70 MHz 11.3 10.7 Bits [4, 5, 6] fIN = 169 MHz 11.0 Bits fIN = 238 MHz 11.0 Bits fIN = 398 MHz 10.0 Bits THD Total harmonic disortion fIN = 10 MHz –81 dBFS fIN = 70 MHz –79.9 –67 dBFS [4, 5, 6] fIN = 169 MHz –82.4 dBFS fIN = 238 MHz –76.6 dBFS fIN = 398 MHz –63.2 dBFS HD2 Second-order harmonic distortion fIN = 10 MHz –95.4 dBFS fIN = 70 MHz –88.5 –70 dBFS [4, 5, 6] fIN = 169 MHz –88.3 dBFS fIN = 238 MHz –77.3 dBFS fIN = 398 MHz –60.9 dBFS |
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