Not Recommended for New Designs

TUSB8040

SLLSE42I – SEPTEMBER 2010 – REVISED SEPTEMBER 2013

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For details on SMBus requirements refer to the System Management Bus Specification.

3.3

Configuration Registers

The internal configuration registers are accessed on byte boundaries. The configuration register values

are loaded with defaults but can be over-written when the TUSB8040 is in I2C or SMBus mode.

3.3.1

ROM Signature Register

Table 3-2. Register Offset 0h

BIT NO.

7

6

5

4

3

2

1

0

RESET STATE

0

0

0

0

0

0

0

0

Table 3-3. Bit Descriptions – ROM Signature Register

BIT

FIELD NAME

ACCESS

DESCRIPTION

ROM Signature Register. This register is used by the TUSB8040 in I2C mode to validate

the attached EEPROM has been programmed. The first byte of the EEPROM is compared

7:0

romSignature

RW

to the mask 55h and if not a match, the TUSB8040 aborts the EEPROM load and executes

with the register defaults.

3.3.2

Vendor ID LSB Register

Table 3-4. Register Offset 1h

BIT NO.

7

6

5

4

3

2

1

0

RESET STATE

0

1

0

1

0

0

0

1

Table 3-5. Bit Descriptions – Vendor ID LSB Register

BIT

FIELD NAME

ACCESS

DESCRIPTION

Vendor ID LSB. Least significant byte of the unique vendor ID assigned by the USB-IF; the

7:0

vendorIdLsb

RW

default value of this register is 51h representing the LSB of the TI Vendor ID 0451h. The

value may be over-written to indicate a customer Vendor ID.

3.3.3

Vendor ID MSB Register

Table 3-6. Register Offset 2h

BIT NO.

7

6

5

4

3

2

1

0

RESET STATE

0

0

0

0

0

1

0

0

Table 3-7. Bit Descriptions – Vendor ID MSB Register

BIT

FIELD NAME

ACCESS

DESCRIPTION

Vendor ID MSB. Most significant byte of the unique vendor ID assigned by the USB-IF; the

7:0

vendorIdMsb

RW

default value of this register is 04h representing the MSB of the TI Vendor ID 0451h. The

value may be over-written to indicate a customer Vendor ID.

14

FUNCTIONAL DESCRIPTION

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