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TS5MP645

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SCDS385B – JANUARY 2018 – REVISED JULY 2018

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8.4 Device Functional Modes

8.4.1 Pin Functions

SEL and OE have weak 6-MΩ pulldown resistors to prevent floating input logic.

Table 1. Function Table

OE

SEL

Function

H

X

I/O pins High-Impedance

L

L

CLK(P/N) = CLKA(P/N)

Dn(P/N) = DAn(P/N)

L

H

CLK(P/N) = CLKB(P/N)

Dn(P/N) = DBn(P/N)

8.4.2

Low Power Mode

While the output enable pin OE is supplied with a logic high the device remains in low power state. This reduces

the current consumption substantially and the switches are be high impedance. The SEL pin is ignored while the

OE remains high. Upon exiting low power mode, the switch status reflects the SEL pin as seen in Table 1.

8.4.3

Switch Enabled Mode

While the output enable pin OE is supplied with a logic low the device will remain in switch enabled mode.