TUSB8040ARKMR datasheet(13/38 Pages) TI2

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TUSB8040A

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SLLSEA7F – MAY 2012 – REVISED SEPTEMBER 2013

2.5

2C/SMBUS Signals

Table 2-5. I2C/SMBUS Signals

SIGNAL NAME

TYPE

DESCRIPTION

NO.

I2C clock/SMBus clock. Function of terminal depends on the setting of the SMBUSz input.

When SMBUSz = 1, this terminal acts as the serial clock interface for an I2C EEPROM.

When SMBUSz = 0, this terminal acts as the serial clock interface for an SMBus host.

The SCL_SMBCLK terminal is sampled at the deassertion of reset to determine if SuperSpeed

USB low power states U1 and U2 are initiated. If SCL_SMBCLK is low, (default), U1 / U2 power

SCL/SMBCLK

I/O, PD

B17

states are enabled.

If SCL_SMBCLK is high, entry to U1 / U2 power states is not initiated by the hub downstream

ports, but is accepted. This input is over-ridden if SDA_SMBDAT is sampled as a ‘1’. If an

EEPROM is installed, U1/U2 power state support is controlled by the Device Configuration

Can be left unconnected if external interface not implemented.

I2C data/SMBus data. Function of terminal depends on the setting of the SMBUSz input.

When SMBUSz = 1, this terminal acts as the serial data interface for an I2C EEPROM.

When SMBUSz = 0, this terminal acts as the serial data interface for an SMBus host.

The SDA_SMBDAT terminal is sampled at the deassertion of reset to determine if SuperSpeed

USB low power states U1 and U2 are disabled. If SDA_SMBDAT is high, U1 and U2 low power

SDA/SMBDAT

I/O, PD

A19

states are disabled. If SDA_SMBDAT is low, U1 and U2 low power states are enabled.

If the optional EEPROM or SMBUS is implemented, the value of the u1u2Disable bit of the

Device Configuration Register determines if the low power states U1 and U2 are enabled.

Can be left unconnected if external interface not implemented and U1 and U2 are to be

enabled.

I2C/SMBus mode select.

1 = I2C Mode Selected

SMBUSz

I, PU

B18

0 = SMBus Mode Selected

Can be left unconnected if external interface not implemented.

PIN DESCRIPTIONS

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