5.6 Electrical Characteristics

At TA = 25°C unless otherwise noted

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VRWM

Reverse stand-off voltage

IIO < 500nA, across operating

temperature range

3.6

V

ILEAKAGE

Leakage current at 3.6V

VIO = 3.6V, Any IO pin to GND

3

50

nA

VBRF

Breakdown voltage, Any IO pin to

GND (1)

IIO = 1mA

4.5

7.5

V

VFWD

Diode forward voltage, GND to IO pin

IIO = 1mA

0.8

V

VHOLD

Holding voltage, Any IO pin to GND (2) IIO = 1mA

5

V

VCLAMP

Surge Clamping voltage, tp = 8/20µs

IPP = 1 A, Any IO pin to GND

5.1

V

IPP = 12A, Any IO pin to GND

6

V

IPP = 1 A, GND to any IO pin

1.2

V

IPP = 12A, GND to any IO pin

3

V

TLP Clamping Voltage, tp = 100ns

IPP = 16A, any IO to GND pin

5.8

V

IPP = 16A, GND to any IO pin

3.1

V

CLINE

Line capacitance, any IO to GND

VIO = 0V, Vp-p = 30mV, f = 1MHz

2.3

2.8

pF

ΔCLINE

Variation of line capacitance

CLINE1 - CLINE2, VIO = 0V, Vp-p =

30mV, f = 1MHz

0.05

0.1

pF

CCROSS

Line-to-line capacitance

VIO = 0V, Vrms = 30mV, f = 1MHz

1.25

1.5

pF

(1)

VBRF is defined as the max voltage obtained at 1mA when sweeping the voltage up, before the device latches into the snapback state

(2)

VHOLD is defined as the voltage when 1mA is applied, after the device has successfully latched into the snapback state.

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SLVSEG8B – MAY 2018 – REVISED JANUARY 2024

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