Time

with buffer

without Buffer

12

INA139-Q1, INA169-Q1

SGLS185F – SEPTEMBER 2003 – REVISED MAY 2016

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In many applications, digitizing the output of the INA1x9-Q1 is required. Digitizing is accomplished by connecting

the output of the amplifier to an ADC. It is very common for an ADC to have a dynamic input impedance. If the

INA1x9-Q1 output is connected directly to an ADC input, the input impedance of the ADC is effectively connected

in parallel with gain setting resistor RL. This parallel impedance combination affects the gain of the system and

the impact on the gain is difficult to estimate accurately. A simple solution that eliminates the paralleling of

impedances, and simplifies the gain of the circuit is to place a buffer amplifier, such as the OPA340, between the

output of the INA1x9-Q1 and the input to the ADC.

Figure 10 illustrates this concept. Notice that a low-pass filter is placed between the OPA340 output and the

input to the ADC. The filter capacitor is required to provide any instantaneous demand for current required by the

input stage of the ADC. The filter resistor is required to isolate the OPA340 output from the filter capacitor in

order to maintain circuit stability. The values for the filter components vary according to the operational amplifier

used for the buffer and the particular ADC selected. More information regarding the design of the low-pass filter

is found in the TI Precision Design, 16 bit 1MSPS Data Acquisition Reference Design for Single-Ended

Multiplexed Applications, TIPD173.

Figure 11 shows the expected results when driving an ADC at 1 MSPS with and without buffering the INA1x9-Q1

output. Without the buffer, the high impedance of the INA1x9-Q1 reacts with the input capacitance and sample-

and-hold capacitance of the ADC, and does not allow the sampled value to reach the correct final value before

the ADC is reset, and the next conversion starts. Adding the buffer amplifier significantly reduces the output

impedance driving the sample-and-hold circuitry, and allows for higher conversion rates.

8.2.1.3 Application Curve

Figure 11. Driving an ADC With and Without a Buffer