LM2641

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SNVS040B – JANUARY 2000 – REVISED APRIL 2013

Theory of Operation

Basic Operation of the Current-Mode Controller

The output voltage is held at a constant value by the main control loop, which is made up of the error amplifier,

the current sense amplifier, and the PWM comparator (refer to the Block Diagram, Figure 4).

The LM2641 controller has two primary modes of operation: Forced Pulse-Width Modulation (FPWM) where the

controller always operates at a fixed frequency, and Pulse-Skipping mode where the controller frequency

decreases at reduced output loads to improve light-load efficiency.

FPWM Mode of Operation

Pulling the FPWM pin low initiates a mode of operation called Forced Pulse-Width Modulation (FPWM). This

means that the LM2641 will always operate at a fixed frequency, regardless of output load. The cycle of

operation is:

The high-side FET switch turns ON at the beginning of every clock cycle, causing current to flow through the

inductor. The inductor current ramps up, causing a voltage drop across the sense resistor, and this voltage is

amplified by the current sense amplifier.

The voltage signal from the current sense amplifier is applied to the input of the PWM comparator, where it is

compared to the control level set by the error amplifier. Once the current sense signal reaches this control

voltage, the PWM comparator resets the driver logic which turns OFF the high-side FET switch.

The low-side FET switch turns on after a delay time which is the lesser of either:

(a) The time it takes the SW pin voltage to reach zero (this voltage is sensed by the shoot-through protection

circuitry).

(b) 100 ns, which is the pre-set value for maximum delay.

When operating at very light loads (in FPWM mode), the inductor current must flow in a negative direction

through the low-side FET switch in order to maintain the fixed-frequency mode of operation. For this reason, the

built-in zero cross detector is disabled when ever FPWM mode is activated (that is, when ever the FPWM pin is

pulled to a low state).

It should be noted that if the FPWM pin is high (operation described in the FPWM Mode of Operation section),

the zero cross detector will turn OFF the low-side FET switch anytime the inductor current drops to zero (which

prevents negative inductor current).

Pulse-Skipping Mode of Operation

Pulling the FPWM pin high allows the LM2641 to operate in pulse-skipping mode at light loads, where the

switching frequency decreases as the output load is reduced. The controller will operate in fixed-frequency mode,

as described in the Pulse-Skipping Mode of Operation section, if the output load current is sufficiently high.

Pulse-skipping results in higher efficiency at light loads, as decreasing the switching frequency reduces switching

losses. The load current value where the transition from fixed-frequency to pulse-skipping operation occurs is the

point where the inductor current goes low enough to cause the voltage measured across the current sense

resistor (R4 or R13) to drop below 25 mV.

In pulse-skipping mode, the high-side FET switch will turn ON at the beginning of the first clock cycle which

occurs after the voltage at the feedback pin falls below the reference voltage. The high-side FET switch remains

ON until the voltage across the current sense resistor rises to 25 mV (and then it turns OFF).

Ramp Compensation

All current-mode controllers require the use of ramp compensation to prevent subharmonic oscillations, and this

compensation is built into the LM2641. The internal compensation assumes an RSENSE value of 25 mΩ, inductor

value of 6.8µH, and a maximum output voltage of 6V.

To prevent oscillations, the slope M of the compensation ramp must be equal to the maximum downward slope

of the voltage waveform at the output of the current sense amplifier. The relationship of the slope M to the

external components is given by:

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