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SLG47004 Datasheet(PDF) 23 Page - Renesas Technology Corp |
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SLG47004 Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 302 page  Datasheet 8-Sep-2022 CFR0011-120-00 Revision 3.0 23 of 301 © 2022 Renesas Electronics Corporation SLG47004 GreenPAK Programmable Mixed-Signal Matrix with In-System Programmability and Advanced Analog Features Note 1 Does not meet standard I2C specifications: tof = 20x(VDD/5.5 V) (min); For Fast-mode Plus IOL = 20 mA (min) at VOL = 0.4 V. Note 2 For Fast-mode Plus SDA pin must be configured as NMOS 2x Open-Drain, see register [1155] in Section 21. Table 8: EC of the I2C Pins for DILV at T = -40 °C to +85 °C, VDD = 2.4 V to 5.5 V Unless Otherwise Noted Parameter Description Condition Fast-Mode Unit Min Max VIL LOW-level Input Voltage -0.5 0.3xVDD V VIH HIGH-level Input Voltage 0.7xVDD 5.5 V VHYS Hysteresis of Schmitt Trigger Inputs 0.05xVDD -- V VOL1 LOW-Level Output Voltage 1 (Open-Drain) at 3 mA sink current VDD > 2 V 0 0.4 V VOL2 LOW-Level Output Voltage 2 (Open-Drain) at 2 mA sink current VDD ≤ 2 V 0 0.2xVDD V IOL LOW-Level Output Current (Note 1) VOL = 0.4 V, VDD = 2.4 V 3 -- mA VOL = 0.4 V, VDD = 3.0 V 3 -- mA VOL = 0.4 V, VDD = 4.5 V 3 -- mA VOL= 0.6 V 6 -- mA tof Output Fall Time from VIHmin to VILmax (Note 1) 14x (VDD/5.5 V) 250 ns tSP Pulse Width of Spikes that must be suppressed by the Input Filter 0 50 ns Ii Input Current (each IO Pin) 0.1xVDD < VI < 0.9xVDDmax -10 +10 µA Ci Capacitance (each IO Pin) -- 10 pF Note 1 Does not meet standard I2C specifications: tof = 20x(VDD/5.5 V) (min); For Fast-mode Plus IOL = 20 mA (min) at VOL = 0.4 V. Note 2 For Fast-mode Plus SDA pin must be configured as NMOS 2x Open-Drain, see register [1155] in Section 21. Table 9: I2C Pins Timing Characteristics for DI at T = -40 °C to +85 °C, VDD = 2.4 V to 5.5 V Unless Otherwise Noted Parameter Description Condition Fast-Mode Fast-Mode Plus Unit Min Max Min Max FSCL Clock Frequency, SCL -- 400 -- 1000 kHz tLOW Clock Pulse Width Low 1300 -- 500 -- ns tHIGH Clock Pulse Width High 600 -- 260 -- ns tI Input Filter Spike Suppression (SCL, SDA) -- 50 -- 50 ns tAA Clock Low to Data Out Valid -- 900 -- 450 ns Table 7: EC of the I2C Pins for DI at T = -40 °C to +85 °C, VDD = 2.4 V to 5.5 V Unless Otherwise Noted(Continued) Parameter Description Condition Fast-Mode Fast-Mode Plus Unit Min Max Min Max |
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