8 Detailed Description

8.1 Reference

The SN74HCS153 is a high speed silicon gate CMOS multiplexer well suited to multiplexing and data routing

applications. It contains two 4:1 multiplexers.

The SN74HCS153 operates asynchronously, with each Y output being equal to the input selected by the

address inputs (A, B). Both channels are controlled by the same address inputs.

The strobe (G) inputs force the respective Y outputs low, regardless of the state of other inputs.

All inputs include Schmitt-triggers allowing for slow input transitions and providing additional noise margin.

8.2 Functional Block Diagram

00

01

10

11

A

B

BA

xC0

xC1

xC2

xC3

xY

xG

Shared Control Logic

One of Two 4:1 Multiplexers

Figure 8-1. Logic Diagram (Positive Logic) for SN74HCS153

8.3 Feature Description

8.3.1 Balanced CMOS Push-Pull Outputs

This device includes balanced CMOS push-pull outputs. The term "balanced" indicates that the device can sink

and source similar currents. The drive capability of this device may create fast edges into light loads so routing

and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable

of driving larger currents than the device can sustain without being damaged. It is important for the output power

of the device to be limited to avoid damage due to overcurrent. The electrical and thermal limits defined in the

Absolute Maximum Ratings must be followed at all times.

Unused push-pull CMOS outputs should be left disconnected.

8.3.2 CMOS Schmitt-Trigger Inputs

This device includes inputs with the Schmitt-trigger architecture. These inputs are high impedance and are

typically modeled as a resistor in parallel with the input capacitance given in the Electrical Characteristics table

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SN74HCS153

SCLS846 – SEPTEMBER 2020

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