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TAS5342ADDVR Datasheet(PDF) 7 Page - Texas Instruments

Part # TAS5342ADDVR
Description  TAS5342A 100-W Stereo Digital Amplifier Power Stage
PDF  41 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS5342ADDVR Datasheet(HTML) 7 Page - Texas Instruments

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TAS5342A
www.ti.com
SLAS623A – NOVEMBER 2008 – REVISED NOVEMBER 2016
Product Folder Links: TAS5342A
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
(1)
SNR is calculated relative to 0-dBFS input level.
(2)
Actual system idle losses are affected by core losses of output inductors.
6.6
Audio Specifications (BTL)
Audio performance is recorded as a chipset consisting of a TAS5518 pwm processor (modulation index limited to 97.7%) and
a TAS5342A power stage. PCB and system configuration are in accordance with recommended guidelines. Audio frequency
= 1 kHz, PVDD_x = 31.5 V, GVDD_x = 12 V, RL = 4 Ω, fS = 384 kHz, ROC = 27 kΩ, TC = 75°C, Output Filter: LDEM = 10 μH,
CDEM = 470 nF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POMAX
Maximum Power Output
RL = 4 Ω, 10% THD+N, clipped input signal
100
W
RL = 6 Ω, 10% THD+N, clipped input signal
80
RL = 8 Ω, 10% THD+N, clipped input signal
65
PO
Unclipped Power Output
RL = 4 Ω, 0 dBFS, unclipped input signal
80
RL = 6 Ω, 0 dBFS, unclipped input signal
64
RL = 8 Ω, 0 dBFS, unclipped input signal
50
THD+N
Total harmonic distortion + noise
0 dBFS; AES17 filter
0.4%
1 W; AES17 filter
0.09%
Vn
Output integrated noise
A-weighted, AES17 filter, Auto mute disabled
45
μV
SNR
Signal-to-noise ratio (1)
A-weighted, AES17 filter, Auto mute disabled
110
dB
DNR
Dynamic range
A-weighted, input level = –60 dBFS, AES17
filter
110
dB
DC Offset
Output offset voltage
±15
mV
Pidle
Power dissipation due to idle losses
(IPVDD_X)
PO = 0 W, all halfbridges switching
(2)
2
W
(1)
SNR is calculated relative to 0-dBFS input level.
(2)
Actual system idle losses are affected by core losses of output inductors.
6.7
Audio Specifications (Single-Ended Output)
Audio performance is recorded as a chipset consisting of a TAS5086 pwm processor (modulation index limited to 97.7%) and
a TAS5342A power stage. PCB and system configuration are in accordance with recommended guidelines. Audio frequency
= 1 kHz, PVDD_x = 31.5 V, GVDD_x = 12 V, RL = 4 Ω, fS = 384 kHz, ROC = 27 kΩ, TC = 75°C, Output Filter: LDEM = 20 μH,
CDEM = 1 μF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POMAX
Maximum Power Output
RL = 3 Ω, 10% THD+N, clipped input
signal
40
W
RL = 4 Ω, 10% THD+N, clipped input
signal
30
PO
Unclipped Power Output
RL = 3 Ω, 0 dBFS, unclipped input signal
30
RL = 4 Ω, 0 dBFS, unclipped input signal
20
THD+N
Total harmonic distortion + noise
0 dBFS; AES17 filter
0.2%
1 W; AES17 filter
0.1%
Vn
Output integrated noise
A-weighted, AES17 filter, Auto mute
disabled
35
μV
SNR
Signal-to-noise ratio(1)
A-weighted, AES17 filter, Auto mute
disabled
109
dB
DNR
Dynamic range
A-weighted, input level = –60 dBFS
AES17 filter
109
dB
Pidle
Power dissipation due to idle losses (IPVDD_X)
PO = 0 W, all half bridges switching
(2)
2
W



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