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TLC5916IPWR Datasheet(PDF) 4 Page - Texas Instruments |
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TLC5916IPWR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 40 page ![]() TLC5916, TLC5917 SLVS695D – JUNE 2007 – REVISED JANUARY 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT VDD Supply voltage 0 7 V VI Input voltage –0.4 VDD + 0.4 V VO Output voltage –0.5 20 V fclk Clock frequency 25 MHz IOUT Output current 120 mA IGND GND terminal current 960 mA TA Operating free-air temperature –40 125 °C TJ Operating junction temperature –40 150 °C Tstg Storage temperature –55 150 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 7.2 ESD Ratings VALUE UNIT Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±1500 V(ESD) Electrostatic discharge V Charged-device model (CDM), per JEDEC specification JESD22- ±500 C101(2) (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions MIN MAX UNIT VDD Supply voltage 3 5.5 V VO Supply voltage to output pins OUT0–OUT7 20 V VO ≥ 0.6 V 3 IO Output current DC test circuit mA VO ≥ 1 V 120 IOH High-level output current source SDO shorted to GND –1 mA IOL Low-level output current sink SDO shorted to VCC 1 mA VIH High-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0.7 × VDD VDD V VIL Low-level input voltage CLK, OE(ED2), LE(ED1), and SDI 0 0.3 × VDD V 7.4 Thermal Information TLC5916 TLC5917 THERMAL METRIC(1) 16 PINS 16 PINS UNIT D N PW D N PW RθJA Junction-to-ambient thermal resistance 87.4 51.8 113.9 87.4 51.8 114.8 RθJC(top) Junction-to-case (top) thermal resistance 48.1 39.1 35.2 48.1 39.1 35.9 RθJB Junction-to-board thermal resistance 44.4 31.8 59.2 44.4 31.8 59.8 °C/W ψJT Junction-to-top characterization parameter 12.5 23.9 1.3 12.5 23.9 1.3 ψJB Junction-to-board characterization parameter 44.2 31.7 58.5 44.2 31.7 59.2 RθJC(bot) Junction-to-case (bottom) thermal resistance — — — — — — (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 4 Submit Documentation Feedback Copyright © 2007–2015, Texas Instruments Incorporated Product Folder Links: TLC5916 TLC5917 |
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