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TLV702 Datasheet(PDF) 3 Page - Texas Instruments |
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TLV702 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 37 page ![]() OUT NC IN GND EN 1 2 3 5 4 EN N/C N/C 6 5 4 IN GND OUT 1 2 3 3 TLV702 www.ti.com SLVSAG6D – SEPTEMBER 2010 – REVISED JULY 2019 Product Folder Links: TLV702 Submit Documentation Feedback Copyright © 2010–2019, Texas Instruments Incorporated 5 Pin Configuration and Functions DBV Package 5-Pin SOT-23 Top View DSE Package 6-Pin WSON Top View Pin Functions PIN I/O DESCRIPTION NAME SOT-23 WSON IN 1 1 I Input pin. A small, 1-μF ceramic capacitor is recommended from this pin to ground to assure stability and good transient performance. See Input and Output Capacitor Requirements in Application Information for more details. GND 2 2 — Ground pin EN 3 6 I Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode and reduces operating current to 1 μA, nominal. For TLV702P, output voltage is discharged through an internal 120-Ω resistor when device is shut down. NC 4 4, 5 — No connection. This pin can be tied to ground to improve thermal dissipation. OUT 5 3 O Regulated output voltage pin. A small, 1-μF ceramic capacitor is needed from this pin to ground to assure stability. See Input and Output Capacitor Requirements in Application Information for more details. |
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