NB679A

–28V VIN, FIXED 5.1V-8A BUCK CONVERTER WITH LDO AND LP# VOUT SCALING

NB679A Rev. 1.03

www.MonolithicPower.com

6

7/27/2017

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PIN FUNCTIONS

PIN #

Name

Description

1

VIN

Supply voltage. VIN supplies power for the internal MOSFET and regulator. The NB679A

operates from a 5.5V to 24V input rail. An input capacitor is needed to decouple the input

rail. Use wide PCB traces and multiple vias to make the connection. Apply at least two

layers for this input trace.

2

PGND

Power ground. To make the connection, use wide PCB traces and enough vias to handle

the load current.

3

PG

Power good output. The output of PG is an open-drain signal. It is high if the output

voltage is higher than 95% or lower than 105% of the nominal voltage.

4

NC

No connection.

5

VOUT

Senses the output voltage of the buck regulator. Connect VOUT to the output

capacitor of the regulator directly. VOUT also acts as the input of the internal LDO switch

over-power input. Keep the VOUT sensing trace far away from the SW node. Vias should

be avoided on the VOUT sensing trace. A > 25 mil trace is required.

6

LDO

Internal LDO output. The driver and control circuits are powered from this voltage.

Decouple with a minimum 4.7µF ceramic capacitor as close to LDO as possible. X7R or

X5R grade dielectric ceramic capacitors are recommended for their stable temperature

characteristics. Once the PG of the output voltage of the buck regulator is ready, it will

switch over the LDO output to reduce power loss.

7

SW

Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to

the VIN voltage by the high-side switch during the on-time of the PWM duty cycle. The

inductor current drives SW negative during the off time. The on resistance of the low-side

switch and the internal diode fixes the negative voltage. Use wide and short PCB traces to

make the connection. Try to minimize the area of the SW pattern.

8

BST

Bootstrap. A capacitor connected between SW and BST is required to form a floating

supply across the high-side switch driver.

9

VCC

Internal VCC LDO output. The driver and control circuits are powered from this voltage.

Decouple with a minimum 1µF ceramic capacitor as close to VCC as possible. X7R or

X5R grade dielectric ceramic capacitors are recommended for their stable temperature

characteristics.

10

AGND

Signal logic ground. A Kelvin connection to PGND is required.

11

EN

Buck enable. EN is a digital input that turns the buck regulator on or off. When the power

supply of the control circuit is ready, drive EN high to turn on the buck regulator and drive

EN low to turn off the buck regulator. Note that there is a 600k

Ω internal pull low resistor.

Connect EN with 3V3 through a pull-up resistor or a resistive voltage divider for automatic

start-up. EN threshold also sets mode between USM and normal. When EN is in the range

of 1.4V to 1.8V, it will enter USM. If EN is in the range of 2.6V to 3.6V, it is normal mode.

12

LP#

Low-power mode control logic. LP# is pulled high internally. Leave LP# open to enter

normal mode with a 5.1V Vout. Drive LP# low to enter low-power mode with lower than a

4.85V Vout.