TPS53689 Dual-channel (N + M ≤ 8 phase) D-CAP+™, Step-down,

Multiphase Controller with PMBus and VR14 SVID Interfaces

1 Features

• Input voltage range: 4.5 V to 17 V

• Output voltage range: 0.25 V to 5.5 V

• Dual output supporting N+M phase configurations

(N+M ≤ 8, M ≤ 4)

• Intel® VR14 SVID compliant with PSYS support

• Backward compatible to VR13.HC/VR13.0 SVID

• Automatic NVM fault status logging

• Dynamic current limit for improved Fast-Vmode

performance

• Fully compatible with TI NexFET™ power stage for

high-density solutions

• Enhanced D-CAP+ control to provider superior

transient performance with excellent dynamic

current sharing

• Dynamic phase shedding with programmable

thresholds for optimizing efficiency at light and

heavy loads

• Configurable with non-volatile memory (NVM) for

low external component count

• Accurate, adjustable, adaptive voltage positioning

(AVP, load line) support

• Individual per-phase IMON calibration, with multi-

slope gain calibration to increase system accuracy.

• Fast phase-adding for transient undershoot

reduction

• Diode braking with programmable timeout for

reduced transient overshoot

• Patented AutoBalance™ current sharing

• Programmable per-phase valley current limit

(OCL)

• PMBus™ v1.3.1 system interface for telemetry of

voltage, current, power, temperature, and fault

conditions

• Programmable loop compensation through PMBus

• Driverless configuration for efficient high-

frequency switching

• 5.00 mm × 5.00 mm, 40-pin, QFN package

2 Applications

• Data center & enterprise computing rack server

• Hardware accelerator

• Network interface card (NIC)

• ASIC and high performance client

3 Description

The TPS53689 is a VR14 SVID compliant step

down controller with two channels, built-in non-volatile

memory (NVM), and PMBus™ interface, and is fully

compatible with TI NexFET™ power stages. Advanced

control features such as the D-CAP+ architecture with

undershoot reduction (USR) and overshoot reduction

(OSR) provide fast transient response, low output

capacitance, and good dynamic current sharing.

The device also provides novel phase interleaving

strategy and dynamic phase shedding for efficiency

improvement at different loads. Adjustable control

of output voltage slew rate and adaptive voltage

positioning are natively supported. In addition, the

device supports the PMBus communication interface

for reporting the telemetry of voltage, current, power,

temperature, and fault conditions to the host system.

All programmable parameters can be configured

through the PMBus interface and can be stored in

NVM as the new default values, to minimize the

external component count.

The TPS53689 device is offered in a thermally

enhanced 40-pin QFN packaged and is rated to

operate from –40°C to 125°C.

Device Information

PART NUMBER

PACKAGE(1)

BODY SIZE (NOM)

TPS53689

QFN (40)

5.00 mm × 5.00 mm

(1)

For all available packages, see the orderable addendum at

the end of the data sheet.

TPS53689

PWM1

Power

Stage

PMBus

CSP1

PWM2

Power

Stage

CSP2

Power

Stage

PWM8

CSP8

Simplified Application

TPS53689

SLUSEL9 – JUNE 2021

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.