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CC2530 Datasheet(PDF) 12 Page - Texas Instruments |
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CC2530 Datasheet(HTML) 12 Page - Texas Instruments |
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12 / 38 page ![]() RESET_N Px.n T0299-01 1 2 CC2530F32, CC2530F64 CC2530F128, CC2530F256 SWRS081B – APRIL 2009 – REVISED FEBRUARY 2011 www.ti.com CONTROL INPUT AC CHARACTERISTICS TA = –40°C to 125°C, VDD = 2 V to 3.6 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT System clock, fSYSCLK The undivided system clock is 32 MHz when crystal oscillator is used. The undivided system clock is 16 MHz when calibrated 16-MHz RC 16 32 MHz tSYSCLK = 1/fSYSCLK oscillator is used. See item 1, Figure 1. This is the shortest pulse that is recognized as a complete reset pin request. Note that shorter pulses may be RESET_N low duration 1 μs recognized but might not lead to complete reset of all modules within the chip. See item 2, Figure 1.This is the shortest pulse that is recognized as Interrupt pulse duration 20 ns an interrupt request. Figure 1. Control Input AC Characteristics 12 Submit Documentation Feedback © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CC2530F32 CC2530F64 CC2530F128 CC2530F256 |
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